Semiconductor memory device with high operating current and...

Details Semiconductor memory device with high operating current and... Semiconductor memory device with high operating current and...

2007-12-04

2007-12-04

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S500000, C257S369000, C257SE29324

Reexamination Certificate

active

11300233

ABSTRACT:
In a semiconductor memory device with a high operating current and a method of manufacturing the same, a semiconductor substrate is formed in which a memory cell region and a peripheral circuit region including an N-channel metal oxide semiconductor (NMOS) region and a P-channel metal oxide semiconductor (PMOS) region are defined. A gate electrode with sidewall spacers is formed in each of the memory cell region and the peripheral circuit region. Source and drain regions are formed in the semiconductor substrate at sides of the gate electrode to form metal oxide semiconductor (MOS) transistors. A first etch stop layer is formed on the semiconductor substrate where the MOS transistors are formed. A second etch stop layer is selectively formed in the NMOS region of the peripheral circuit region.

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“A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors”, by T. Ghani,et al., 2003, IEDM Tech. Dig., pp. 11.6.1-11.6.3.

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