Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2007-01-17
2008-11-18
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Precharge
C365S185170, C365S185230, C365S185250, C365S189070
Reexamination Certificate
active
07453749
ABSTRACT:
A semiconductor memory device includes: a cell array with electrically rewritable and non-volatile memory cells disposed at crossings between bit lines and word lines, which intersect with each other; a row decoder configured to drive the word lines; and a sense amplifier so coupled to a selected bit line as to compare a cell current with a reference current and sense data of a selected memory cell in the cell array, wherein bit line precharge is performed for a certain time prior to the sense amplifier activation in a data read mode while word line boost is performed in advance of the bit line precharge.
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Suzuki Toshihiro
Toda Haruki
Kabushiki Kaisha Toshiba
Nguyen Tuan T.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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