Semiconductor memory device with built-in self test circuit

Details Semiconductor memory device with built-in self test circuit Semiconductor memory device with built-in self test circuit

1997-12-22

1999-08-31

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

365236, 36523003, 36518902, 36523002, G11C 700

Patent

active

059462469

ABSTRACT:
A semiconductor memory device with a built-in self test (BIST) circuit is disclosed including: a plurality of memory blocks; a plurality of selectors for selecting an address, a control signal and data of each memory block to a normal mode or a test mode in response to a BIST mode signal; a plurality of background generators for generating data to be written in each memory block and comparing data; a plurality of comparators for comparing data read from each memory block with the comparing data in response to the BIST mode signal and for generating a comparative result; a combination circuit for combining outputs of the plurality of comparator and for generating a test result; and a test controller for supplying a test address and a control signal to the plurality of selectors, for supplying a background number and an output inversion control signal to the plurality of background generators, and for supplying a comparing control signal to the plurality of comparators.

REFERENCES:
patent: 5258986 (1993-11-01), Zerbe
patent: 5383195 (1995-01-01), Spence et al.
patent: 5675545 (1997-10-01), Madhavan et al.

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