Semiconductor memory device with bit line load circuit for high

Details Semiconductor memory device with bit line load circuit for high Semiconductor memory device with bit line load circuit for high

1995-03-02

1996-11-12

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Precharge

36518906, 36518911, 365204, G11C 800

Patent

active

055746950

ABSTRACT:
A semiconductor memory has memory cells for data storage, connected to bit line pair a memory cell selection decoder for selecting the memory cell in the plurality of memory cells corresponding to a bit line direction address, a bit line load circuit for supplying a voltage potential to the bit line pair, and an impedance control circuit for receiving the bit line direction address and changing an impedance of the bit line load circuit according to the bit line direction address. The semiconductor memory performs data write-in and data readout operations from/to the memory cell in the plurality of memory cells selected by the memory cell selection decoder through the bit line pair.

REFERENCES:
patent: 4928268 (1990-05-01), Nogle et al.
patent: 5349360 (1994-09-01), Suh et al.

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