Semiconductor memory device with an improved write control circu

Details Semiconductor memory device with an improved write control circu Semiconductor memory device with an improved write control circu

1990-06-19

1991-02-12

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365195, G11C 802

Patent

active

049929836

ABSTRACT:
A semiconductor memory device with a write control circuit free from error which may be induced during readout operation by noise on power line, or the like, is disclosed. The memory device comprises a write circuit for writing data to a selected memory cell, and a read circuit for reading data from the selected memory cell, a first control circuit for enabling the write circuit in response to a write enable signal, and a second control circuit for enabling the read circuit in response to a read enable signal. The first control circuit additionally receives the read enable signal and enable the write circuit only when the write enable signal is present and the read enable signal is not present.

REFERENCES:
patent: 4669064 (1987-05-01), Ishimoto
patent: 4858188 (1989-08-01), Kobayashi
patent: 4922957 (1990-05-01), Mizukami

Affiliated with

Also associated with

Rating

Semiconductor memory device with an improved write control circu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with an improved write control circu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with an improved write control circu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-25436