Semiconductor memory device with adjustable I/O bandwidth

Details Semiconductor memory device with adjustable I/O bandwidth Semiconductor memory device with adjustable I/O bandwidth

2006-02-28

2006-02-28

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S230020, C365S145000, C710S307000

Reexamination Certificate

active

07006387

ABSTRACT:
A semiconductor memory device with adjustable I/O bandwidth includes a plurality of data I/O buffers connected one by one to a plurality of I/O ports, a switch array including a plurality of switches for connecting the plurality of data I/O buffers to a plurality of sense amplifier arrays, and a switch control unit for receiving external control signals to control the data I/O buffer and the plurality of switches.

REFERENCES:
patent: 4873664 (1989-10-01), Eaton, Jr.
patent: 5134584 (1992-07-01), Boler et al.
patent: 5301155 (1994-04-01), Wada et al.
patent: 5373467 (1994-12-01), Wang
patent: 5404454 (1995-04-01), Parks
patent: 6078516 (2000-06-01), Hayashi
patent: 6097666 (2000-08-01), Sakui et al.
patent: 6259628 (2001-07-01), Park
patent: 6285611 (2001-09-01), Kang
patent: 6556504 (2003-04-01), Kwon et al.
patent: 6597621 (2003-07-01), Tsuji et al.
patent: 6600674 (2003-07-01), Kasai
patent: 6775172 (2004-08-01), Kang et al.
patent: 1999-0065972 (1999-08-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device with adjustable I/O bandwidth does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with adjustable I/O bandwidth, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with adjustable I/O bandwidth will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3674383