Semiconductor memory device regulable in access time after fabri

Details Semiconductor memory device regulable in access time after fabri Semiconductor memory device regulable in access time after fabri

1993-04-27

1994-04-12

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518901, 36523008, 307443, G11C 700, G11C 1140

Patent

active

053031881

ABSTRACT:
An electrically programmable read only memory device stores data bits each in the form of either high or low threshold level of a memory cell, and an accessed data bit is transferred from a selected memory cell to an output data buffer unit for delivery to a destination, wherein a plurality of output data buffer circuits are provided in the output data buffer unit and are selectively used for the data delivery depending upon current driving capability expected by a customer.

REFERENCES:
patent: 4928265 (1990-05-01), Higuchi et al.
patent: 4985644 (1991-01-01), Okihara et al.
patent: 5073872 (1991-12-01), Masuda et al.
patent: 5151621 (1992-09-01), Goto
patent: 5245573 (1993-09-01), Nakaora

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