Semiconductor memory device operating using read only memory...

Details Semiconductor memory device operating using read only memory... Semiconductor memory device operating using read only memory...

2008-05-27

2008-05-27

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S200000

Reexamination Certificate

active

07379350

ABSTRACT:
A semiconductor memory device operating using initialization data, includes a first latch circuit which latches the initialization data, a memory cell array including a plurality of memory cells and having a first region and a second region, the first region storing data, and a buffer circuit having a function for accessing the first latch circuit, the buffer circuit transferring, to the second region, the initialization data transferred from the first latch circuit, and transferring, to the first latch circuit, the initialization data transferred form the second region.

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Fukashi Morishita, et al., “A 312MHz 16Mb Random-Cycle Embedded DRAM Macro with 73μW Power-Down Mode for Mobile Applications”, Digest of Technical Papers, IEEE International Solid-State Circuits Conference, Session 11, DRAM, 11.2, Feb. 17, 2004, 9 pages.

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