Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2007-02-13
2007-02-13
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Precharge
C365S202000, C365S230030, C365S205000, C365S190000, C365S051000, C365S063000
Reexamination Certificate
active
11262920
ABSTRACT:
A semiconductor integrated circuit device equipped with a memory circuit, which realizes the speeding up of its operation and low power consumption in a simple configuration is provided. At input/output nodes of a sense amplifier including a CMOS latch circuit for performing an amplifying operation in response to an operation timing signal, a pair of first precharge MOSFETs brought to an on state during a precharge period to supply a precharge voltage, and select switch MOSFETs for connecting the input/output nodes and each complementary bit line pair in response to a select signal are provided. A second precharge MOSFET for short-circuiting the complementary bit line pair is provided between the complementary bit line pair. A memory array is provided which includes dynamic memory cells each comprising an address selecting MOSFET and a storage capacitor, each of which is provided between one of the complementary bit line pair and a word line intersecting it. The thickness of a gate insulating film for the second precharge MOSFET is formed thin as compared with that of a gate insulating film for the selecting MOSFETs.
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Hasegawa Masatoshi
Hokari Tomofumi
Tanaka Yousuke
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hitachi , Ltd.
Reed Smith LLP
Tran Andrew Q.
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