Semiconductor memory device, memory system and data recovery...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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C710S005000, C710S008000, C710S015000, C710S033000

Reexamination Certificate

active

08069284

ABSTRACT:
A semiconductor memory device includes a nonvolatile memory device having a plurality of physical sectors, and a memory controller configured to translate a logical address received from a host to a physical address, with reference to mapping data that defines a correspondence between the logical address and the physical address. The nonvolatile memory device is configured to access a first physical sector corresponding to the physical address, and, when a data delete command is provided from the host to the memory controller to delete first data that is stored in the first physical sector, the memory controller delays an erase and/or merge operation for the first physical sector in which the first data is stored.

REFERENCES:
patent: 2005/0055531 (2005-03-01), Asami et al.
patent: 2007/0094440 (2007-04-01), Torabi
patent: 2007/0268754 (2007-11-01), Lee et al.
patent: 06-301586 (1994-10-01), None
patent: 2005-085011 (2005-03-01), None
patent: 10-2003-0010987 (2003-02-01), None
patent: 10-2005-0026330 (2005-03-01), None
Kuo, Tei-Wei, Implementation and Challenging Issues of Flash Memory Storage Systems, Mar. 29, 2007 [online, accessed on Dec. 5, 2010], National Taiwan University, URL: http://rtns07.irisa.fr/fichiers/RTNS2007-keynote.pdf.

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