Semiconductor memory device including floating body...

Details Semiconductor memory device including floating body... Semiconductor memory device including floating body...

2011-04-12

2011-04-12

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

Reexamination Certificate

active

07924644

ABSTRACT:
A semiconductor memory device includes a memory cell array including a plurality of memory cells, where each memory cell includes a transistor with a floating body region in which majority carriers are accumulated in a steady state. In write and read operations, a first data state corresponding to the steady state is written to and read from at least one selected memory cell of the memory cell array by supplying a first bipolar current through the at least one selected memory cell, and a second data state is written to and read from the at least one selected memory cell by supplying a second bipolar current which is smaller than the first bipolar current through the at least one selected memory cell. In a refresh operation, memory cells of the memory cell array storing the second data state are refreshed.

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