Semiconductor memory device having two different output buffers

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

326 62, 326105, 326136, G11C 1708

Patent

active

054249821

ABSTRACT:
An internal read data signal passes through an output buffer to an output terminal. An identification code signal passes through an output buffer to the output terminal. These two output buffers are enabled and disabled in accordance with a data output enable signal and a code output enable signal.

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