Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1999-10-28
2000-12-26
Nelms, David
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36518911, 365226, G11C 1604
Patent
active
061669652
ABSTRACT:
In a semiconductor memory device including a data bus, a data bus charging circuit for charging the data bus, a data bus discharging circuit for discharging the data bus in accordance with a cell read data signal, and a push-pull type output circuit formed by a first N-channel MOS transistor connected between a first power supply terminal and an output terminal and a second N-channel MOS transistor connected between the output terminal and a second power supply terminal, a step-up circuit is connected between the data bus and a gate of the first N-channel MOS transistor to generate a step-up voltage in accordance with a voltage at the data bus.
REFERENCES:
patent: 5903501 (1999-05-01), Kurosaki
Lam David
NEC Corporation
Nelms David
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