Semiconductor memory device having output drive and delay unit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

Reexamination Certificate

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Details

C326S050000, C326S083000, C327S108000

Reexamination Certificate

active

07663399

ABSTRACT:
An output driver for use in a semiconductor memory device includes a pull-up metal oxide semiconductor (MOS) transistor for pulling-up a voltage loaded on an output node in response to a pull-up control signal; a pull-up linear element connected between the pull-up MOS transistor and the output node for increasing a linearity of an output current; a pull-down MOS transistor for pulling-down the voltage loaded on the output node in response to a pull-down control signal; and a pull-down linear element connected between the pull-down MOS transistor and the output node for increasing the linearity of the output current, wherein the pull-up MOS transistor and the pull-up linear element are different typed MOS transistors and the pull-down MOS transistor and the pull-down linear element are different typed MOS transistors.

REFERENCES:
patent: 6118310 (2000-09-01), Esch, Jr.
patent: 6362678 (2002-03-01), Bosnyak et al.
patent: 6756839 (2004-06-01), Hall et al.
patent: 2006/0125520 (2006-06-01), Le et al.
patent: 62-176326 (1987-08-01), None
patent: 2-162824 (1990-06-01), None
patent: 11-317653 (1999-11-01), None
patent: 1991-0004735 (1991-07-01), None
patent: 1998-057056 (1998-09-01), None
patent: 10-0255507 (2000-02-01), None
Korean Patent Gazette issued in Korean Patent Application No. KR 10-2006-0039319, mailed Jan. 17, 2007.

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