Semiconductor memory device having multilevel memory cell array

Details Semiconductor memory device having multilevel memory cell array Semiconductor memory device having multilevel memory cell array

1997-02-06

1998-11-17

Nguyen, Tan T.

Static information storage and retrieval

Systems using particular element

Ternary

36518503, 36523003, G11C 1156

Patent

active

058386106

ABSTRACT:
A semiconductor memory device includes a multilevel memory cell array having a plurality of multilevel memory cells each storing data of at least three bits, a regular memory cell array having a plurality of regular memory cells each storing data of two bits, a first X decoder which selects a word line of the multilevel memory cell array corresponding to an input address, a second X decoder which selected a word line of the regular memory cell array corresponding to the input address, a pulse generator circuit which generates a plurality of pulse signals with mutually different active periods, a voltage generator circuit which generates a control signal whose voltage varies stepwise corresponding to the levels of the plurality of pulses, supplying circuit for supplying the control signal to the selected word line of the multilevel memory cell array, selecting circuit for selecting a bit line of either one of the regular memory cell array or the multilevel memory cell array in response to the input address and an amplifier circuit which amplifiers the level of the selected bit line and outputs the result.

REFERENCES:
patent: 4661929 (1987-04-01), Aoki et al.
patent: 5680343 (1997-10-01), Kamaya

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