Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-12-07
1994-10-25
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
365210, 365 96, G11C 1300
Patent
active
053595602
ABSTRACT:
A row redundancy circuit for use in a semiconductor memory device. The row redundancy circuit providing fuse boxes to repair defective normal memory cells even in the adjacent normal memory cell arrays.
REFERENCES:
patent: 4908798 (1990-03-01), Urai
Chin Dae-Je
Jang Tae-Sung
Suh Dong-Il
Donohoe Charles R.
Fears Terrell W.
Samsung Electronics Co,. Ltd.
Westerlund Robert A.
Whitt Stephen R.
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