Semiconductor memory device having improved precharge scheme

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365230, 365233, G11C 700, G11C 800

Patent

active

048170577

ABSTRACT:
A semiconductor memory device provided with an improved precharge scheme for bit lines is disclosed. A plurality of bit lines are divided into a plurality of bit line group and a precharge control signal is applied only to precharge transistors in a selected bit line group.

REFERENCES:
patent: 4417328 (1983-11-01), Ochii
patent: 4592026 (1986-05-01), Matsukawa et al.
patent: 4625298 (1986-11-01), Sumi
patent: 4661931 (1987-04-01), Flannagan et al.

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