Semiconductor memory device having hierarchically structured...

Details Semiconductor memory device having hierarchically structured... Semiconductor memory device having hierarchically structured...

2007-08-07

2007-08-07

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S230060, C365S230030

Reexamination Certificate

active

11074722

ABSTRACT:
A semiconductor memory device is provided comprising precharge circuits corresponding to global data line pairs, but not a precharge circuit corresponding to a local data line pair. In a command waiting state, data line selection switches are controlled to be in a connected state, so that the local data line pair and the global data line pairs are precharged all together while being connected to each other. In a command executing state, one of the data line selection switches, the one being not required for command execution, is in an open state. Similarly, a semiconductor memory device comprising only a precharge circuit corresponding to a local data line pair can be provided.

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patent: 6930939 (2005-08-01), Lim et al.
patent: 7002855 (2006-02-01), Wijeratne et al.
patent: 2000-030455 (2000-01-01), None

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