Semiconductor memory device having enhanced sense amplifier

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S205000

Reexamination Certificate

active

11020310

ABSTRACT:
Disclosed is a semiconductor memory device with a reduced write recovery time and an increased refresh period. The semiconductor memory device incorporating a plurality of memory cells therein, including: a bit line sense amplifier (BLSA) array provided with a plurality of bit line sense amplifiers for sensing and amplifying data of the memory cells applied to bit lines; and a BLSA driving control means for overdriving a bit line connected to the bit line sense amplifier in response to an active command, and for overdriving the bit line in response to a precharge command.

REFERENCES:
patent: 6480425 (2002-11-01), Yanagisawa et al.
patent: 6566929 (2003-05-01), Pyo
patent: 6778460 (2004-08-01), Jung
patent: 6853593 (2005-02-01), Bae
patent: 7042781 (2006-05-01), Kim
patent: 2004/0213063 (2004-10-01), Park
patent: 10-0540484 (2005-12-01), None

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