Semiconductor memory device having common circuitry for...

Details Semiconductor memory device having common circuitry for... Semiconductor memory device having common circuitry for...

2007-12-31

2011-10-25

Sofocleous, Alexander (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189120, C365S191000, C365S230080

Reexamination Certificate

active

08045397

ABSTRACT:
A semiconductor memory device is capable of controlling an address and data mask information through the use of a common part, thereby reducing chip size. The semiconductor memory device for receiving the addresses and data mask information via a common pin includes a buffer unit and a shift register unit. The buffer unit receives the addresses and data mask information. The shift register unit is comprised of a plurality of latch stages connected in series, for sequentially latching the addresses and data mask information being inputted in series, and an address output unit and a data mask information output unit for outputting information from different latch stages.

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Qimonda GDDR5—White Paper. Aug. 2007. pp. 1-10.
Notice of Allowance issued from Korean Intellectual Property Office on Dec. 16, 2008.

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