Semiconductor memory device having column redundancy system

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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365210, 36523008, G11C 1300

Patent

active

052316041

ABSTRACT:
A semiconductor memory device for handling video data comprises a column redundancy system for substituting erroneous bits. In one embodiment, the memory device comprises a memory cell array and a register for serial-parallel and/or parallel-serial conversion. There provide a redundant column section adjoined to the memory cell array and a redundant latch section functioning as a part of the register. The register includes a plurality of serially connected flipflops. Data are transferred in idle at the flipflop which is responded to a defective column of the memory cell array. In another embodiment, the memory device comprises a memory cell array and a read register to output data serially. Erroneous data of a defective column of the array are replaced by correlative data at the read register.

REFERENCES:
patent: 3763480 (1973-10-01), Weimer
patent: 4868789 (1989-09-01), MacDonald

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