Semiconductor memory device having clamp circuits

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

307530, 365182, G11C 1140

Patent

active

045920206

ABSTRACT:
A semiconductor memory device having clamp circuits, each of which operates reliably without being affected by the resistance of a word line. Each of the clamp circuits is connected to a corresponding word line and clamps the potential of the word line to a reference potential when it is in a non-selected condition. Each of the clamp circuits includes a flip-flop having a first terminal connected to the corresponding word line and a second terminal which receives a control signal for operating each of the clamp circuits. The control signal is applied to the second terminal when the potential of a selected word line exceeds at least the potential necessary for inverting the condition of the flip-flop.

REFERENCES:
patent: 4504929 (1985-03-01), Takemae et al.

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