Semiconductor memory device having cache memory function

Static information storage and retrieval – Read/write circuit – Multiplexing

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36518903, 36518905, 36518907, G11C 700

Patent

active

057198101

ABSTRACT:
A semiconductor memory device comprising a memory cell array for storing input data therein, a data output buffer for outputting the data stored in the memory cell array externally, an output terminal for transferring the output data from the data output buffer externally, a data input buffer for transferring the output data from the data output buffer to the memory cell array, a data register for temporarily storing the transferred data from the data input buffer, and a multiplexer connected among the memory cell array, the data register and the data output buffer, for selecting one of the data stored in the memory cell array and the data stored in the data register and transferring the selected data to the data output buffer. In the normal case, the multiplexer selects the data stored in the memory cell array and transfers the selected data to the data output buffer. In a specific case where the input data to the memory cell array have the same values or a regularity, the multiplexer selects the data stored in the data register and transfers the selected data to the data output buffer.

REFERENCES:
patent: 5483660 (1996-01-01), Yishay et al.
patent: 5497347 (1996-03-01), Feng
patent: 5502683 (1996-03-01), Marchioro

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