Semiconductor memory device having bit lines capable of partial

Static information storage and retrieval – Systems using particular element – Capacitors

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365205, 365203, G11C 1124

Patent

active

051896397

ABSTRACT:
Transfer transistors are connected midway on respective bit lines of a bit line pair. Memory cells are provided for a first bit line pair and a second bit line pair partitioned by the transfer transistor, and a sense amplifier is connected to the first bit line pair. When a memory cell connected to the first bit line pair is selected, the transfer transistor turns off. Therefore, the potential difference appears only on the first bit line pair, with the potentials amplified by the sense amplifier. In this state, the potential of the second bit line pair is not changed and not amplified.

REFERENCES:
patent: 4498154 (1985-02-01), Hoffmann
patent: 4546457 (1985-10-01), Nozaki et al.
patent: 4606010 (1986-08-01), Saito
patent: 4680734 (1987-07-01), Baba et al.
patent: 4792927 (1988-12-01), Miyamoto et al.
patent: 4799197 (1989-01-01), Kodama et al.
Hiroshi Kawamoto et al., "A 288K CMOS Pseudostatic RAM" IEEE Journal of Solid-State Circuits, vol. SC-19, No. 5, pp. 619-623, Oct. 1984.

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