Semiconductor memory device having an open bit line...

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S230030, C365S210100

Reexamination Certificate

active

07447088

ABSTRACT:
A memory core having an open bit line structure and a semiconductor memory device having the memory core includes an edge sub-array and a dummy bit line control circuit. The edge sub-array has a plurality of word lines, a plurality of bit lines and a plurality of dummy bit lines. The dummy bit line control circuit amplifies and latches voltage signals of the dummy bit lines in a test sensing mode. Accordingly, the semiconductor memory device having the memory core may test defects of the edge sub-array included in the memory core.

REFERENCES:
patent: 6535439 (2003-03-01), Cowles
patent: 6650584 (2003-11-01), Cowles
patent: 7224596 (2007-05-01), Jeong et al.
patent: 7307897 (2007-12-01), Shin
patent: 7313036 (2007-12-01), Kim
patent: 7382668 (2008-06-01), Park et al.
patent: 2007/0104006 (2007-05-01), Hwang
patent: 2007/0153612 (2007-07-01), Lee et al.
patent: 2001-118397 (2001-04-01), None
patent: 2001-189098 (2001-07-01), None

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