Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2007-01-22
2008-11-04
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Testing
C365S230030, C365S210100
Reexamination Certificate
active
07447088
ABSTRACT:
A memory core having an open bit line structure and a semiconductor memory device having the memory core includes an edge sub-array and a dummy bit line control circuit. The edge sub-array has a plurality of word lines, a plurality of bit lines and a plurality of dummy bit lines. The dummy bit line control circuit amplifies and latches voltage signals of the dummy bit lines in a test sensing mode. Accordingly, the semiconductor memory device having the memory core may test defects of the edge sub-array included in the memory core.
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F. Chau & Assoc. LLC
Hoang Huan
Samsung Electronics Co,. Ltd.
Weinberg Michael J
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