Static information storage and retrieval – Read/write circuit – Precharge
Patent
1983-07-15
1987-01-13
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Precharge
361226, 361189, 307482, G11C 1140
Patent
active
046369813
ABSTRACT:
A semiconductor memory device includes charge storage type memory cells, word lines and a bit line connected to the memory cells, a sense amplifier for detecting the memory data on the bit line, and a voltage push-up circuit for setting up a potential on the bit line. The voltage push-up circuit at first sets the potential on the bit line at a power supply voltage level after the memory data having a high logic level is detected by the sense amplifier, and then pushes up the potential on the bit line to a higher potential level than the power supply voltage.
REFERENCES:
patent: 3765002 (1973-10-01), Basse
patent: 4404661 (1983-09-01), Nagayama et al.
patent: 4417329 (1983-11-01), Mezawa et al.
patent: 4475178 (1984-10-01), Kinoshita
patent: 4503343 (1985-03-01), Ohuchi
Taniguchi et al. "Fully Boosted 64k Dynamic Ram with Automatic and Self-Refresh", vol. SC-16, No. 5, Oct. 81, pp. 492-498, IEEE Journal of Solid State Circuits.
Japanese Patent Disclosure (KOKAI) No. 52-123849, Hiroshi Watanabe, 1977.
Japanese Patent Disclosure (KOKAI) No. 54-158828, Mitsugi Ogura, 1979.
Rao et al., "64-K Dynamic RAM Needs Only One 5-Volt Supply to Outstrip 64-K Parts", Electronics, pp. 109-116, Fig. 4, Sep. 4, 1978.
Fears Terrell W.
Tokyo Shibaura Denki Kabushiki Kaisha
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