Semiconductor memory device having a sensitivity controllable se

Static information storage and retrieval – Read/write circuit – Precharge

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365226, G11C 1300

Patent

active

051365456

ABSTRACT:
A semiconductor memory device includes a sense amplifier circuit which includes a load circuit. The impedance of the load circuit is adjustable by a bias voltage. The bias voltage is generated by a bias circuit which also controls a bit line initial potential.

REFERENCES:
patent: 5045726 (1991-09-01), Leung

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