Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1998-07-23
1999-06-15
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365233, 36518902, G11C 700
Patent
active
059128470
ABSTRACT:
A synchronous dynamic random access memory (SDRAM) comprises a save register for temporarily storing in a write cycle read data read from one of memory cells in a preceding read cycle, and a selector for selecting data from the save register or data from a read section. The saved data is output in a next read cycle succeeding the write cycle in which the data is saved.
REFERENCES:
patent: 5631866 (1997-05-01), Oka et al.
patent: 5694370 (1997-12-01), Yoon
Le Vu A.
NEC Corporation
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