Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1998-01-30
1999-12-07
Nelms, David
Static information storage and retrieval
Read/write circuit
Data refresh
36523003, 365194, G11C 700
Patent
active
059994711
ABSTRACT:
A refresh method for a semiconductor memory device reduces the magnitude of the peak current drawn from the power supply. Multiple memory cells coupled to a plurality of word lines are refreshed at one time in order to reduce stand-by power consumption in the refresh mode. Such refresh mode can include automatic refresh or self refresh modes. A plurality of word lines are selected and multiple bit line sense amplifiers corresponding to the selected word lines are activated for the refresh operation. The selected plurality of bit line sense amplifiers are divided into two or more groups and the points in time at which the bit line sense amplifiers are enabled are different for each group. The selected word line and the selected bit line sense amplifiers are then disabled. Thus, the magnitude of the peak current is reduced by dispersing the points in time at which the bit line sense amplifiers are enabled, thereby preventing system misoperation by excessive peak currents in a battery powered system.
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Auduone Gene N.
Nelms David
Samsung Electronics Co,. Ltd.
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