Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1985-10-17
1988-04-26
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365238, G11C 1140
Patent
active
047409223
ABSTRACT:
A semiconductor memory device having a read-modify-write (RMW) configuration suitable for modifying a large number of data with high speed and a simple circuit. The RMW configuration includes a data input and output circuit (11, 14, 16) for simultaneously storing or reading a plurality of data into or from the memory cells, a data output circuit (10, 12, 13) for serially reading a plurality of data from the memory cells, and data modification circuits (15) for successively receiving the plurality of data from the data output circuit, modifying the received data if necessary and transmitting the modified data to the data input and output circuit.
REFERENCES:
patent: 3763480 (1973-10-01), Weimer
patent: 4272829 (1981-06-01), Schmidt et al.
patent: 4276609 (1981-06-01), Patel
patent: 4422161 (1983-12-01), Kressel et al.
patent: 4429375 (1984-01-01), Kobayashi
European Search Report EP 85307600.8, Apr. 1986.
Fears Terrell W.
Fujitsu Limited
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