Semiconductor memory device for low power system

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S207000, C365S210130

Reexamination Certificate

active

11038861

ABSTRACT:
A semiconductor memory device for outputting or storing a data in response to inputted address and command includes a first cell array for outputting the data to one of a bit line and a bit line bar; a first reference cell block for outputting a reference signal to the other of the bit line and the bit line bar; a sense amplifying block for sensing and amplifying a voltage difference between the bit line and the bit line bar; and a floating control block for floating the bit line and the bit line bar if a precharge command signal is activated.

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patent: 200-0050284 (2000-08-01), None

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