Semiconductor memory device for high speed operation

Details Semiconductor memory device for high speed operation Semiconductor memory device for high speed operation

1996-05-29

1998-09-08

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Precharge

365190, G11C 700

Patent

active

058055150

ABSTRACT:
A semiconductor memory has memory cells for data storage, connected to bit line pair a memory cell selection decoder for selecting the memory cell in the plurality of memory cells corresponding to a bit line direction address, a bit line load circuit for supplying a voltage potential to the bit line pair, and an impedance control circuit for receiving the bit line direction address and changing an impedance of the bit line load circuit according to the bit line direction address. The semiconductor memory performs data write-in and data readout operations from/to the memory cell in the plurality of memory cells selected by the memory cell selection decoder through the bit line pair.

REFERENCES:
patent: 4928268 (1990-05-01), Nogle et al.
patent: 5349560 (1994-09-01), Suh et al.
patent: 5574695 (1996-11-01), Suzuki

Affiliated with

Also associated with

Rating

Semiconductor memory device for high speed operation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device for high speed operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device for high speed operation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1289772