Semiconductor memory device for continuously accessing a memory

Details Semiconductor memory device for continuously accessing a memory Semiconductor memory device for continuously accessing a memory

1994-02-22

1995-05-23

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523005, 36518912, 36523009, G11C 1300

Patent

active

054187451

ABSTRACT:
A semiconductor memory device having: a memory cell array with random accessible memory cells disposed in a matrix form, the memory cell array including first memory cell arrays and second memory cell arrays alternately disposed in a column direction, and the first and second memory cell arrays being divided in accordance with a column address; a data register unit for storing one row data of the memory cell array, the data register unit being serially accessed by an external circuit, the data register unit having first data registers and second data registers alternately disposed in the column direction; and a data transfer gate unit including a plurality of data transfer gates for controlling data transfer between the memory cell array and the data register unit, each of the plurality of data transfer gates including a gate for connecting each of the first memory cell array to each of the first data registers, and a gate for connecting each of the second memory array to each of the second data registers, and further including a gate for connecting each of the first memory cell array to each of the second data registers, and a gate for connecting each of the second memory cell arrays to each of the first data registers.

REFERENCES:
patent: 4757477 (1988-06-01), Nagayama et al.
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 5029134 (1991-07-01), Watanabe

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