Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2007-11-13
2007-11-13
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Precharge
C365S230030, C365S210130
Reexamination Certificate
active
11185738
ABSTRACT:
A semiconductor memory includes first and second cell arrays for applying a data signal onto pairs of first bit lines and second bit lines, respectively, first and second reference cell blocks each of which applies a reference signal onto a corresponding bit line bar or a corresponding bit line when the data signal is inputted to the corresponding bit line or the corresponding bit line bar, and a sense amp for sensing and amplifying a difference of data signals applied onto one pair of bit lines connected thereto of the pairs of first and second bit lines, wherein each bit line maintains a floating state without an input of an extra pre-charge voltage upon a pre-charge operation, and the other pair of bit lines disconnected to the sense amp are pre-charged with the reference signal by the corresponding reference cell block.
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Ahn Jin-Hong
Kang Hee-Bok
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Hynix / Semiconductor Inc.
Lam David
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