Semiconductor memory device capable of setting substrate voltage

Details Semiconductor memory device capable of setting substrate voltage Semiconductor memory device capable of setting substrate voltage

1998-03-16

1999-09-21

Nelms, David

Static information storage and retrieval

Read/write circuit

Data refresh

365201, G11C 700

Patent

active

059562811

ABSTRACT:
A switching circuit is provided which activates a shallow level detector and inactivates a deep level detector when a disturb test signal or a self refresh signal is activated. Accordingly, a shallow substrate voltage at the same level as a detection level of the shallow level detector can be generated by a substrate voltage generating circuit not only in a disturb test mode but also in a self refresh mode. As a result, the area penalty due to the shallow level detector is reduced.

REFERENCES:
patent: 5396114 (1995-03-01), Lee et al.
patent: 5633825 (1997-05-01), Sakuta et al.
patent: 5770964 (1998-06-01), Suma
patent: 5875146 (1999-02-01), Itou

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