Semiconductor memory device capable of selecting a plurality of

Details Semiconductor memory device capable of selecting a plurality of Semiconductor memory device capable of selecting a plurality of

1997-12-30

2000-09-05

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Data refresh

365193, 365194, 3652257, G11C 700

Patent

active

061153117

ABSTRACT:
A semiconductor memory device having an improved column select control circuit. The semiconductor memory device includes a memory cell array consisting of a plurality of volatile memory cells and a column select line decoder for selecting a column line of the memory cell array. The semiconductor memory device includes at least two different refresh cycle modes designed within a single chip. A mode select circuit generates a mode select signal for selecting one of at least two refresh modes. A column select control circuit controls the enable time of the column select line decoder enable signal responsive to the mode select signal and to row address strobe signal for providing the column select line decoder enable signal to the column select line decoder.

REFERENCES:
patent: 5867442 (1999-02-01), Kim et al.

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