Semiconductor memory device capable of operating with potentials

Details Semiconductor memory device capable of operating with potentials Semiconductor memory device capable of operating with potentials

1996-05-01

1997-08-05

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365201, 365233, G11C 700

Patent

active

056549245

ABSTRACT:
A semiconductor memory device is provided which can apply a voltage stress to every adjacent bit lines even when data is written using a data bit compression function in a burn-in test mode. More specifically, when data is written using the data bit compression function in the test mode, an input buffer circuit is brought to a state in which it receives a signal corresponding to a signal dq0 applied to a specific input/output terminal by a switch circuit controlled by a test mode specify signal TE in common. When an inversion designate signal INV is in an active state, a complementary signal corresponding to a signal obtained by inversion of signal dq0 by an inverting circuit is output to internal data buses IO0, ZIO0, and IO2, ZIO2. On the other hand, a complementary signal corresponding to signal dq0 is output to internal data buses IO1, ZIO1, and IO3, ZIO3.

REFERENCES:
patent: 5151881 (1992-09-01), Kajigaya et al.

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