Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1994-09-21
1995-10-31
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36518901, 36518904, 36518907, 36523001, G11C 1300
Patent
active
054635829
ABSTRACT:
A semiconductor memory device enables multi-direction data access at a high speed with a simple circuit construction. The semiconductor memory device includes a plurality of word lines, a plurality of bit lines and a plurality of memory cells connected to the bit lines and word lines. A row decoder, connected to the word lines, selects one of the word lines in response to a row address signal. A selection circuit includes a plurality of column decoders and a direction decoder. Each column decoder receives a portion of a column address signal and the direction decoder selects one of three directions in response to a direction address signal. Each column decoder is selectively enabled based upon the direction address signal. Output circuitry outputs data read out from bit lines selected by the enabled column decoders. Thus, three-dimensional bit map data can be stored in two dimensions.
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Kobayashi Kazuya
Miyasaka Kiyoshi
Ogawa Junji
Fears Terrell W.
Fujitsu Limited
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