Static information storage and retrieval – Read/write circuit – Precharge
Patent
1999-04-06
2000-06-06
Nelms, David
Static information storage and retrieval
Read/write circuit
Precharge
36523003, G11C 700
Patent
active
06072739&
ABSTRACT:
A semiconductor memory device of the present invention includes a data bus and an I/O line which are hierarchically provided data lines. In accordance with a column selection operation, storage data in a memory cell is transmitted from the I/O line through a data bus driver to the data bus. Prior to the column selection operation, the data bus is equalized by an equalization circuit. The equalization circuit includes an equalization capacitor for holding in advance a potential corresponding to an inverted state of the data bus, and a transistor gate for connecting the equalization capacitor and the data bus.
REFERENCES:
patent: 4860257 (1989-08-01), Choi
patent: 5901086 (1999-05-01), Wang et al.
patent: 5907516 (1999-05-01), Kwon et al.
Ho Hoai V.
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
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