Semiconductor memory device based on dummy-cell method

Details Semiconductor memory device based on dummy-cell method Semiconductor memory device based on dummy-cell method

2005-03-15

2005-03-15

Phan, Trong (Department: 2818)

Static information storage and retrieval

Read/write circuit

Precharge

C365S210130, C365S222000

Reexamination Certificate

active

06868023

ABSTRACT:
A semiconductor memory device includes a plurality of bit line pairs, each of which includes a first bit line and a second bit line, a plurality of memory cells which are coupled to said first bit line, and store electric charge in capacitors, a dummy cell which is coupled to a second bit line, and is charged with a predetermined potential, a sense amplifier which amplifies a potential difference between the first bit line and the second bit line, and a control circuit which charges said dummy cell with the predetermined potential only for a fixed time period.

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