Semiconductor memory device and writing method thereof

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S149000, C365S063000

Reexamination Certificate

active

07577041

ABSTRACT:
A semiconductor memory device includes a power supply circuit which generates a write current, a write line to which a logic state is transferred, a first pass transistor connected between the power supply circuit and the write line, and a first register which connects to the write line, receives a logic state of the write line in an input state, stores the received logic state in a storage state, and controls an on/off state of the first pass transistor on the basis of the stored logic state.

REFERENCES:
patent: 6097625 (2000-08-01), Scheuerlein
patent: 6529404 (2003-03-01), Hidaka
patent: 6618317 (2003-09-01), Tsuji et al.
patent: 7277316 (2007-10-01), Turner
patent: 2002/0067632 (2002-06-01), Batson et al.
patent: 2002-170376 (2002-06-01), None

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