Semiconductor memory device and testing method of the same

Details Semiconductor memory device and testing method of the same Semiconductor memory device and testing method of the same

2007-09-28

2010-06-08

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S005110, C714S030000, C714S042000, C714S718000, C714S720000, C714S721000, C714S731000, C714S736000, C714S744000, C714S745000, C365S201000

Reexamination Certificate

active

07734967

ABSTRACT:
A semiconductor memory device, having a test mode and a normal mode, includes a frequency multiplier and a test command sequence generator. The frequency multiplier receives a test clock signal in the test mode and generates multiple internal test clock signals, each of which has a frequency equal to a frequency of an operation clock signal in the normal mode. The test clock signal has a frequency lower than the frequency of the operation clock signal. The test command sequence generator generates at least one command signal in response to the internal test clock signals in the test mode. The at least one command signal corresponds to at least one operation timing parameter of the semiconductor memory device that is to be measured. The frequency multiplier may include a Phase Locked Loop (PLL) or a Delay Locked Loop (DLL).

REFERENCES:
patent: 5910181 (1999-06-01), Hatakenaka et al.
patent: 5933379 (1999-08-01), Park et al.
patent: 6862704 (2005-03-01), Miner
patent: 6934900 (2005-08-01), Cheng et al.
patent: RE38956 (2006-01-01), Beffa et al.
patent: 7269772 (2007-09-01), Li et al.
patent: 7349515 (2008-03-01), Chew et al.
patent: 7551499 (2009-06-01), Lee
patent: 2001/0013110 (2001-08-01), Pierce et al.
patent: 2005/0146981 (2005-07-01), Ahn
patent: 2005/0162949 (2005-07-01), Lindstedt et al.
patent: 2005/0185484 (2005-08-01), Jang et al.
patent: 2007/0046309 (2007-03-01), LaBerge
patent: 2007/0226567 (2007-09-01), Gorman et al.
patent: 2001-291400 (2001-10-01), None
patent: 02001291400 (2001-10-01), None
patent: 1020020048258 (2002-06-01), None
patent: 10-2004-0004568 (2004-01-01), None
patent: 10-2006-0019543 (2006-03-01), None
patent: 1020060038026 (2006-05-01), None
patent: 02/080184 (2002-10-01), None
patent: 2004/105040 (2004-12-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device and testing method of the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and testing method of the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and testing method of the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4217589