Semiconductor memory device and system outputting refresh flag

Details Semiconductor memory device and system outputting refresh flag Semiconductor memory device and system outputting refresh flag

2005-04-12

2005-04-12

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

Reexamination Certificate

active

06879536

ABSTRACT:
A semiconductor memory device includes an oscillator for generating an oscillator output signal; a refresh timer for generating a refresh pulse in response to predetermined first and second control signals, the oscillator output signal, and an external clock signal; a mode register set (MRS) unit for generating the first and second control signals in response to an address signal and an external command, the first control signal controlling time when the refresh pulse is generated by the refresh timer and the second control signal resetting the refresh timer; and a refresh controller for generating a refresh control signal in response to the refresh pulse, the refresh control signal refreshing a memory cell, wherein the refresh control signal is output as a refresh flag while the memory is refreshed.

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