Semiconductor memory device and operating method with hidden...

Details Semiconductor memory device and operating method with hidden... Semiconductor memory device and operating method with hidden...

2007-03-30

2010-02-09

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S222000, C365S189160

Reexamination Certificate

active

07660173

ABSTRACT:
A semiconductor memory device and its operating method are disclosed. The semiconductor memory device includes; a memory cell array including a plurality of memory cells selected in relation to a plurality of word lines and a plurality of bit lines, an address decoder selecting at least one word line in response to a refresh address and selecting all of the plurality of bit lines in response to a hidden write signal when a CBR refresh operation is requested during a test mode, a hidden write control circuit generating the hidden write signal when the CBR refresh operation is requested during the test mode, a refresh address generating circuit generating the refresh address when the CBR refresh operation is requested during the test mode, and a data input circuit applying data to all of the plurality of bit lines when the CBR refresh operation is requested during the test mode.

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