Semiconductor memory device and method with two sense...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S233110, C365S148000, C365S207000

Reexamination Certificate

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08050124

ABSTRACT:
A semiconductor memory device includes: plural bit lines connected with plural memory cells, respectively; plural transfer lines allocated in common to the plural bit lines; sense amplifiers (SA1) and (SA2) connected to these transfer lines, respectively; and a control circuit making the sense amplifier (SA2) perform a converting operation during an amplifying operation performed by the sense amplifier (SA1). Because the plural sense amplifiers are allocated to the same bit lines, and these are operated in parallel in this way, data can be read at a high speed.

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