Semiconductor memory device and method of testing the same

Details Semiconductor memory device and method of testing the same Semiconductor memory device and method of testing the same

2006-12-27

2008-10-28

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S201000

Reexamination Certificate

active

07443748

ABSTRACT:
Disclosed is a semiconductor memory device includes two equalizing elements, each connected between a pair of bit lines and being separately subjected to on/off control by respective control signals. When performing a test, one of the control signals is kept HIGH and the other of the control signal is kept LOW during a precharge period, and activation/deactivation of the two equalizing elements is separately controlled. A failure such as a defect in one of the two equalizing elements subjected to the on/off control by the control signal can be thereby detected.

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