Semiconductor memory device and method of operation thereof

Details Semiconductor memory device and method of operation thereof Semiconductor memory device and method of operation thereof

1994-01-18

1997-05-13

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Ferroelectric

365149, 365210, G11C 1122

Patent

active

056298889

ABSTRACT:
A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.

REFERENCES:
patent: 3990057 (1976-11-01), Kumada
patent: 4873664 (1989-10-01), Eaton, Jr.
patent: 4914627 (1990-04-01), Eaton, Jr. et al.
patent: 5010518 (1991-04-01), Toda

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