Semiconductor memory device and method of operating the same

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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Reexamination Certificate

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07978554

ABSTRACT:
A semiconductor memory device includes a plurality of word lines, a plurality of pairs of bit lines and complementary bit lines, and a plurality of memory cells, each memory cell being disposed at a region where a respective word line and a pair of a bit line and a complementary bit line cross each other. A voltage control unit controls a power voltage to obtain a controlled voltage appliable to the memory cells in response to a control signal that controls an operation of the memory cells. At least one dummy cell is disposed between the voltage control unit and the memory cells and is configured to reduce the controlled voltage to a predetermined level.

REFERENCES:
patent: 6804143 (2004-10-01), Hobson
patent: 7292485 (2007-11-01), Lu et al.
patent: 7324368 (2008-01-01), Wang et al.
patent: 2007/0263447 (2007-11-01), Koike et al.
patent: 2007/0268738 (2007-11-01), Heinrich-Barna et al.

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