Semiconductor memory device and method for manufacturing the...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21648

Reexamination Certificate

active

11108929

ABSTRACT:
A semiconductor memory device includes a plurality of bit line structures arranged in parallel on a semiconductor substrate and having a plurality of bit lines and an insulating material surrounding the bit lines, an isolation layer formed in a portion in spaces between the bit line structures to define a predetermined active region and having substantially the same height as the bit line structures, a semiconductor layer formed in the predetermined active region surrounded by the bit line structures and the isolation layer and having substantially the same height as the bit line structures and the isolation layer, a plurality of word line structures arranged in parallel on the bit line structures, the isolation layer, and the semiconductor layer, and comprising a plurality of word lines and an insulating material surrounding the word lines, and source and drain regions formed in the semiconductor layer on either side of the word line structures.

REFERENCES:
patent: 5392232 (1995-02-01), Kim et al.
patent: 6228700 (2001-05-01), Lee
patent: 6329241 (2001-12-01), Lin
patent: 6570205 (2003-05-01), Shin et al.
patent: 2003/0109104 (2003-06-01), Chen et al.
patent: 11-166452 (1999-06-01), None
patent: 2000-44673 (2000-07-01), None
patent: 2001-56239 (2001-07-01), None
English language abstract of Korean Publication No. 2000-44673.
English language abstract of Korean Publication No. 2001-56239.

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