Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-02-11
2010-02-16
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S201000
Reexamination Certificate
active
07663944
ABSTRACT:
A semiconductor memory device includes an input data delay time adjustor for varying an input delay time, selecting one bit of a n-bit input data, delaying the selected one bit by the input delay time and outputting the delayed bit, in response to a control signal during an input data delay test operation; and an output data delay time adjustor for varying an output delay time, selecting one bit of a m-bit output data, delaying the selected one bit by the output delay time and outputting the delayed bit, in response to the control signal during an output data delay test operation, wherein the input data delay time adjustor is arranged for n-bit input data, and wherein the output data delay time adjustor is arranged for m-bit output data.
REFERENCES:
patent: 5969999 (1999-10-01), Lee
patent: 6292903 (2001-09-01), Coteus et al.
patent: 6339555 (2002-01-01), Hamada et al.
patent: 6353565 (2002-03-01), Ito
patent: 6487647 (2002-11-01), Samson
patent: 6944737 (2005-09-01), Ahn et al.
patent: 2003/0067332 (2003-04-01), Mikhalev et al.
patent: 10-1999-0013465 (1999-02-01), None
patent: 10-2003-0034467 (2003-05-01), None
F. Chau & Associates LLC
Hur J. H.
King Douglas
Samsung Electronics Co,. Ltd.
LandOfFree
Semiconductor memory device and memory system using same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device and memory system using same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and memory system using same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4204105